William Starke

William Starke ’90 (BS in Computer Science), is an IBM Distinguished Engineer and serves as chief architect for IBM Power microprocessors. Starke’s first position with IBM was in the company’s mainframe computing division, developing tools and consulting in processor and system performance. In 1994, he transitioned to IBM’s Power Systems group, focusing first on hardware performance, followed by logic design and processor microarchitecture development. His efforts there focused on multiprocessor cache and memory hierarchies, coherence protocols and transport, large system scaling and reliability, clustering architectures, and accelerator-attach frameworks.

In 2004, Starke became chief cache/nest architect for IBM Power, defining architectural approaches and leading a worldwide team of engineers through the conceptual formation, implementation, and deployment phases for multiple processor generations. Since 2016, he has served as chief architect for the entire IBM Power processor team, leading the efforts of several hundred engineers. He also drives strategic architecture decisions for the platform, engages with clients and business partners, and advises his peers in the development of IBM’s mainframe (System Z) processors and systems.

Throughout his tenure at IBM, Starke’s contributions have been vital to the mission-critical transaction processing and analytics platforms underpinning many of the world’s largest enterprises in banking, insurance, retail, logistics, and healthcare, as well as systems employed by government agencies, defense related activities, and supercomputing applications. He holds over 300 U.S. patents, has authored several articles, and speaks at industry conferences, client conferences, product launch events, and industry analyst briefings.

From the College of Computing Honory Academy

Updated September 2024